Files
Cescal/testbench/concept.cescal
T
2026-05-23 02:13:16 -04:00

23 lines
459 B
Plaintext

//
// Copyright (c) 2026, Chloe M.
// Provided under the BSD-3 clause
//
//
// Operations can only be performed on registers but not
// variables. Register names follow this convention:
// -----------------------------------------------------
// r<bitwidth>:name
//
pub proc log2(v : u64) -> u64 begin
r64:cnt = 0;
r64:tmp = v;
while (r64:tmp != 0) begin
r64:tmp >>= 1;
r64:cnt += 1;
end
return r64:cnt;
end