initial commit

Signed-off-by: Ian Moffett <ian@mirocom.org>
This commit is contained in:
2026-05-24 01:08:46 -04:00
commit ae3e9b26c1
5 changed files with 105 additions and 0 deletions
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*.o
*.d
*.vcd
obj_dir
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//
// Copyright (c) 2026 Mirocom Laboratories and MSP engineers.
// All Rights Reserved.
//
//
// MSP System-on-Chip description
//
// @clk_i: Clock input
// @reset_i: Reset input
//
module soc (
input wire clk_i,
input wire reset_i
);
endmodule
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obj_dir
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#
# Copyright (c) 2026 Mirocom Laboratories and MSP engineers.
# All Rights Reserved.
#
TB_BIN = verilator
TB_FLAGS = \
-Wall \
-Wno-UNUSED \
-DMENSIA_SIM \
--trace \
-cc \
-I../rtl/inc \
$(SV_FILES) \
--exe $(TB_FILES) \
--top-module soc
SV_FILES = $(shell find ../rtl/ -name "*.sv")
TB_FILES = $(shell find . -name "*.cc")
.PHONY: all
all: obj vcd
.PHONY: obj
obj:
$(TB_BIN) $(TB_FLAGS)
.PHONY: vcd
vcd:
make -C obj_dir/ -f Vsoc.mk Vsoc
./obj_dir/Vsoc
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//
// Copyright (c) 2026 Mirocom Laboratories and MSP engineers.
// All Rights Reserved.
//
#include <stdlib.h>
#include <iostream>
#include <verilated.h>
#include <verilated_vcd_c.h>
#include "Vsoc.h"
#include "Vsoc___024root.h"
#define MAX_SIM_ITER 1000
int main(int argc, char** argv, char** env)
{
Vsoc *soc = new Vsoc;
Verilated::traceEverOn(true);
VerilatedVcdC *m_trace = new VerilatedVcdC;
soc->trace(m_trace, 5);
m_trace->open("soc.vcd");
soc->clk_i = 0;
soc->reset_i = 1; /* ACTIVE-LOW */
for (int i = 0; i < MAX_SIM_ITER; ++i) {
soc->eval();
m_trace->dump(i);
switch (i) {
case 0:
soc->reset_i = 0;
break;
case 3:
break;
case 5:
soc->reset_i = 1;
break;
case 6:
break;
case 10:
break;
}
soc->clk_i ^= 1;
}
m_trace->close();
delete soc;
return 0;
}